Processing In Memory Using Emerging Memory Technologies
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Processing In Memory Using Emerging Memory Technologies
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Author : Saransh Gupta
language : en
Publisher:
Release Date : 2018
Processing In Memory Using Emerging Memory Technologies written by Saransh Gupta and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2018 with categories.
Recent years have witnessed a rapid growth in the amount of generated data, owing to the emergence of Internet of Things (IoT). Processing such huge data on traditional computing systems is highly inefficient, mainly due to the limited cache capacity and memory bandwidth. Processing in-memory (PIM) is an emerging paradigm which tries to address this issue. It uses memories as computing units, hence reducing the data transfers between memory and processing cores. However, the application of present PIM techniques is restricted by their limited functionality and inability to process large amounts of data efficiently. In this thesis, we propose novel techniques which exploit the analog properties of emerging memory technologies. Not only do these support more complex functions such as addition, multiplication, and search but also manage and process large data more efficiently. We present a new blocked PIM architecture which uses inter-block interconnects to accelerate data intensive processing. We also introduce a heterogeneous architecture having general purpose cores and PIM-enable memory and a data-dependent task allocation scheme for it. We also apply application specific optimizations and approximation techniques to further design accelerators for neural networks and database query systems. While we design a multiplication-by-constant hardware for neural networks, query processing is accelerated by a novel in-memory nearest search technique. Our neural network accelerator achieves 113.9x higher energy efficiency and 56.3x speedup as compared to AMD GPU. Also, the query accelerator provides 49.3x performance speedup and 32.9x energy savings as compared to recent Intel CPU.
Building Scalable Architectures Using Emerging Memory Technologies
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Author : Kunal Kishore Korgaonkar
language : en
Publisher:
Release Date : 2019
Building Scalable Architectures Using Emerging Memory Technologies written by Kunal Kishore Korgaonkar and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2019 with categories.
A confluence of trends is reshaping computing today. On one end, the massive amounts of data being generated by the proliferation of sensing and internet services are creating a demand for better computer architectures and systems. The other stream of the confluence is the nanotechnology advances that are unearthing new memory device technologies with the potential to replace (or be combined with) conventional memories. Given these trends, this thesis examines emerging memory device technologies that provide a unique opportunity to build computer architectures with efficient and scalable data storage and processing capabilities. The associated memory architectures of these new systems promise to offer distinctive features such as intrinsic non-volatility, highly dense memory structures, extremely low-power consumption and even embedded processing capabilities. Among others, some examples of emerging memory technologies with such features are PCM, 3D Xpoint, STT-RAM and ReRAM. A central question with the new memory architectures built with emerging memory technologies is whether or not the resultant systems are scalable. Towards answering this question, this thesis identifies that conventional memory architecture specific scaling methods may not directly apply in case of emerging memory technologies. These methods were developed mostly for SRAM and DRAM, and today, they do not provide the desired outcomes for emerging memory technologies. As a result, there exist fundamental unsolved problems concerning scalability in building memory architectures. Unfortunately, this means that even though emerging memory technologies provide distinctive features, they may be largely left untapped. Given the scalability concerns, this thesis then advocates a scalability-first approach for building computer architectures using emerging memory technologies while being aware of the limitations and opportunities associated with them. As demonstrations of the scalability-first approach, the thesis discusses several scalability problems encountered in systems using emerging memory technologies. It also brings out potential solutions for each of these problems in the form of novel techniques and tools. For instance, the thesis discusses the problem and a solution for scaling write order enforcement mechanisms for data persistence on large non-volatile main memory systems, followed by the problem and a potential solution for scaling write bandwidth and thereby reducing memory interference on systems with dense non-volatile memory caches. Also discussed are methods for scaling system architectures with in-memory processing capability subject to its operational complexity and other limits. The proposed scalability-first approach points to prospects and ways for better adoption of emerging memory technologies within existing systems. The approach and the solutions also lead to likely transition paths to even more scalable and markedly different systems of the future.
Neuro Inspired Computing Using Emerging Non Volatile Memories
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Author : Yuhan Shi
language : en
Publisher:
Release Date : 2023
Neuro Inspired Computing Using Emerging Non Volatile Memories written by Yuhan Shi and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2023 with categories.
Data movement between separate processing and memory units in traditional von Neumann computing systems is costly in terms of time and energy. The problem is aggravated by the recent explosive growth in data intensive applications related to artificial intelligence. In-memory computing has been proposed as an alternative approach where computational tasks can be performed directly in memory without shuttling back and forth between the processing and memory units. Memory is at the heart of in-memory computing. Technology scaling of mainstream memory technologies, such as static random-access memory (SRAM) and Dynamic random-access memory (DRAM), is increasingly constrained by fundamental technology limits. The recent research progress of various emerging nonvolatile memory (eNVM) device technologies, such as resistive random-access memory (RRAM), phase-change memory (PCM), conductive bridging random-access memory (CBRAM), ferroelectric random-access memory (FeRAM) and spin-transfer torque magnetoresistive random-access memory (STT-MRAM), have drawn tremendous attentions owing to its high speed, low cost, excellent scalability, enhanced storage density. Moreover, an eNVM based crossbar array can perform in-memory matrix vector multiplications in analog manner with high energy efficiency and provide potential opportunities for accelerating computation in various fields such as deep learning, scientific computing and computer vision. This dissertation presents research work on demonstrating a wide range of emerging memory device technologies (CBRAM, RRAM and STT-MRAM) for implementing neuro-inspired in-memory computing in several real-world applications using software and hardware co-design approach. Chapter 1 presents low energy subquantum CBRAM devices and a network pruning technique to reduce network-level energy consumption by hundreds to thousands fold. We showed low energy (10×-100× less than conventional memory technologies) and gradual switching characteristics of CBRAM as synaptic devices. We developed a network pruning algorithm that can be employed during spiking neural network (SNN) training to further reduce the energy by 10×. Using a 512 Kbit subquantum CBRAM array, we experimentally demonstrated high recognition accuracy on the MNIST dataset for digital implementation of unsupervised learning. Chapter 2 presents the details of SNN pruning algorithm that used in Chapter1. The pruning algorithms exploits the features of network weights and prune weights during the training based on neurons' spiking characteristics, leading significant energy saving when implemented in eNVM based in-memory computing hardware. Chapter 3 presents a benchmarking analysis for the potential use of STT-MRAM in in-memory computing against SRAM at deeply scaled technology nodes (14nm and 7nm). A C++ based benchmarking platform is developed and uses LeNet-5, a popular convolutional neural network model (CNN). The platform maps STT-MRAM based in-memory computing architectures to LeNet-5 and can estimate inference accuracy, energy, latency, and area accurately for proposed architectures at different technology nodes compared against SRAM. Chapter 4 presents an adaptive quantization technique that compensates the accuracy loss due to limited conductance levels of PCM based synaptic devices and enables high-accuracy SNN unsupervised learning with low-precision PCM devices. The proposed adaptive quantization technique uses software and hardware co-design approach by designing software algorithms with consideration of real synaptic device characteristics and hardware limitations. Chapter 5 presents a real-world neural engineering application using in-memory computing. It presents an interface between eNVM based crossbar with neural electrodes to implement a real-time and high-energy efficient in-memory spike sorting system. A real-time hardware demonstration is performed using CuOx based eNVM crossbar to sort spike data in different brain regions recorded from multi-electrode arrays in animal experiments, which further extend the eNVM memory technologies for neural engineering applications. Chapter 6 presents a real-world deep learning application using in-memory computing. We demonstrated a direct integration of Ag-based conductive bridge random access memory (Ag-CBRAM) crossbar arrays with Mott-ReLU activation neurons for scalable, energy and area efficient hardware implementation of DNNs. Chapter 7 is the conclusion of this dissertation. The future directions of in-memory computing system based on eNVM technologies are discussed.
Emerging Memory Technologies
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Author : Yuan Xie
language : en
Publisher: Springer Science & Business Media
Release Date : 2013-10-21
Emerging Memory Technologies written by Yuan Xie and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013-10-21 with Technology & Engineering categories.
This book explores the design implications of emerging, non-volatile memory (NVM) technologies on future computer memory hierarchy architecture designs. Since NVM technologies combine the speed of SRAM, the density of DRAM, and the non-volatility of Flash memory, they are very attractive as the basis for future universal memories. This book provides a holistic perspective on the topic, covering modeling, design, architecture and applications. The practical information included in this book will enable designers to exploit emerging memory technologies to improve significantly the performance/power/reliability of future, mainstream integrated circuits.
Melecon 2004
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Author :
language : en
Publisher:
Release Date : 2004
Melecon 2004 written by and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2004 with Electric power categories.
Proceedings Of The Workshop On Picture Data Description And Management
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Author :
language : en
Publisher:
Release Date : 1977
Proceedings Of The Workshop On Picture Data Description And Management written by and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1977 with Image processing categories.
3d Ic Stacking Technology
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Author : Banqiu Wu
language : en
Publisher: McGraw Hill Professional
Release Date : 2011-07-07
3d Ic Stacking Technology written by Banqiu Wu and has been published by McGraw Hill Professional this book supported file pdf, txt, epub, kindle and other format this book has been release on 2011-07-07 with Technology & Engineering categories.
The latest advances in three-dimensional integrated circuit stacking technology With a focus on industrial applications, 3D IC Stacking Technology offers comprehensive coverage of design, test, and fabrication processing methods for three-dimensional device integration. Each chapter in this authoritative guide is written by industry experts and details a separate fabrication step. Future industry applications and cutting-edge design potential are also discussed. This is an essential resource for semiconductor engineers and portable device designers. 3D IC Stacking Technology covers: High density through silicon stacking (TSS) technology Practical design ecosystem for heterogeneous 3D IC products Design automation and TCAD tool solutions for through silicon via (TSV)-based 3D IC stack Process integration for TSV manufacturing High-aspect-ratio silicon etch for TSV Dielectric deposition for TSV Barrier and seed deposition Copper electrodeposition for TSV Chemical mechanical polishing for TSV applications Temporary and permanent bonding Assembly and test aspects of TSV technology
Exploring Memory Hierarchy Design With Emerging Memory Technologies
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Author : Guangyu Sun
language : en
Publisher: Springer Science & Business Media
Release Date : 2013-09-18
Exploring Memory Hierarchy Design With Emerging Memory Technologies written by Guangyu Sun and has been published by Springer Science & Business Media this book supported file pdf, txt, epub, kindle and other format this book has been release on 2013-09-18 with Technology & Engineering categories.
This book equips readers with tools for computer architecture of high performance, low power, and high reliability memory hierarchy in computer systems based on emerging memory technologies, such as STTRAM, PCM, FBDRAM, etc. The techniques described offer advantages of high density, near-zero static power, and immunity to soft errors, which have the potential of overcoming the “memory wall.” The authors discuss memory design from various perspectives: emerging memory technologies are employed in the memory hierarchy with novel architecture modification; hybrid memory structure is introduced to leverage advantages from multiple memory technologies; an analytical model named “Moguls” is introduced to explore quantitatively the optimization design of a memory hierarchy; finally, the vulnerability of the CMPs to radiation-based soft errors is improved by replacing different levels of on-chip memory with STT-RAMs.
Scientific American
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Author :
language : en
Publisher:
Release Date : 1876
Scientific American written by and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 1876 with Science categories.
Monthly magazine devoted to topics of general scientific interest.
Advanced Software Techniques For Emerging Memory Technologies
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Author : Juno Kim
language : en
Publisher:
Release Date : 2023
Advanced Software Techniques For Emerging Memory Technologies written by Juno Kim and has been published by this book supported file pdf, txt, epub, kindle and other format this book has been release on 2023 with categories.
Emerging memory technologies, such as persistent memory and ultra-low-latency SSDs, change the tradeoffs system designers must consider. As storage, they offer considerably faster persistence than traditional SSDs and hard disks. As memory, they expand the capacity of main memory in a single machine at a lower price than conventional, expensive DRAM. Despite these advantages, efficiently leveraging them remains challenging in a variety of software stacks including file systems, databases, graph processing systems, and serverless computing. This dissertation first presents a comprehensive study that reveals the impact of state-of-the-art persistent memory (PMem) storage systems on IO-intensive applications and explores how those applications can best leverage the performance of PMem. It examines various performance problems that PMem introduces at both the file system and application level, and suggests potential optimization paths while discussing their different tradeoffs. Second, the dissertation introduces SubZero, a novel file system API that allows fast and easy access to files residing in PMem file systems. SubZero offers mmap()-like performance for both read and write while providing similar isolation semantics as read() and write(), taking the best of both worlds from file-oriented and memory-oriented IO for efficient access to PMem-resident files. Third, it presents Blaze, a new out-of-core graph processing framework optimized for ultra-low-latency SSDs. While current out-of-core systems cannot fully leverage the high IOPs these devices can deliver due to the high CPU overhead, Blaze achieves high performance on these SSDs with its novel, lightweight parallel value propagation technique using a highly concurrent bin data structure, overcoming the limitations of traditional parallel graph computation techniques such as synchronization or message passing. Finally, it introduces TOSS, our ongoing effort to support a cost-efficient serverless offering based on memory tiering. TOSS aims to maximize the use of slow memory (e.g., PMem, CXL memory) for the execution of serverless functions while achieving similar performance to the executions solely backed by fast memory (e.g., DRAM). Our evaluation shows that TOSS can offload a significant portion of guest VM memory pages to slow memory while achieving minimal slowdown on a variety of serverless workloads.